STOCHASTIC ANALYSIS OF CPU SCHEDULING IN APPLE M-SERIES

Bohdan Mikh, Yuriy Korchak

Abstract


Background. Efficient task scheduling in heterogeneous CPU architectures is critical for maintaining system responsiveness and optimal resource utilization under fluctuating workloads. Apple M-Series processors, based on ARM architecture, integrate high-perfor­mance (P-cores) and energy-efficient (E-cores), allowing adaptive distribution of tasks de­pending on their computational complexity and latency sensitivity. This architectural design presents new challenges and opportunities for analyzing task dispatching mechanisms at the operating system level, particularly within macOS scheduling subsystems.

Materials and Methods. The study employed low-level telemetry data collected from macOS-based systems operating under high-load production-like CI/CD scenarios, simulating real-world parallel task execution. The collected data sets were analyzed using stochastic time series modeling, construction of confidence intervals, approximation of waiting times with exponential and log-normal distributions, autocorrelation function analysis, Pearson correlation metrics, and evaluation of context switching frequency across multiple QoS (Quality of Service) classes.

Results and Discussion. The analysis revealed a clear architectural specialization between core types. P-cores demonstrated consistently higher processing intensity, reduced queuing delays, and superior responsiveness for delay-sensitive tasks, whereas E-cores ensured stable handling of background workloads. Statistical modeling identified a significant inverse correlation between P-core utilization share and overall task latency, confirming that increasing P-core allocation directly improves execution time for critical workloads. Derived autocorrelation and distribution parameters allow the formulation of quantitative models describing resource allocation behavior in Apple Silicon’s heterogeneous environment.

Conclusion. The obtained results provide a statistically grounded basis for improving task dispatching strategies in macOS on Apple Silicon platforms. The findings contribute to better latency predictability, efficient resource balancing, and a deeper understanding of kernel-level scheduling dynamics under highly parallelized workload scenarios.

Keywords: macOS, Apple Silicon, CPU scheduling, stochastic modeling, time series analysis, ARM architecture


Full Text:

PDF

References


  1. Khodabandeloo, B., Khonsari, A., Majidi, A., Hajiesmaili, M. H. (2018). Task Assignment and Scheduling in MPSoC under Process Variation: A Stochastic Approach. 23rd Asia and South Pacific Design Automation Conference (ASP-DAC). IEEE, 690-695. https://doi.org/10.1109/ASPDAC.2018.8297402
  2. Exploring Apple’s M Architecture: A Detailed Overview. (2024). Medium. https://medium.com/@techAsthetic/exploring-apples-m-architecture-a-detailed-overview-e4d29b7deeb8
  3. Xu, T., Ding, A., Fei, Y. (2025). EXAM: Exploiting Exclusive System-Level Cache in Apple M-Series SoCs via Reverse Engineering. Cornell Univ. Computer Science. Cryptography and Security. 15 p. https://doi.org/10.48550/arXiv.2504.13385
  4. Miao, Z., Shao, C., Li, H., & Tang, Z. (2025). Review of Task-Scheduling Methods for Heterogeneous Chips. Electronics, 14 (6), 1191-1215. https://doi.org/10.3390/electronics14061191
  5. Effah, E., Yussif, A.-L., Darkwah, A. A., Lawrence Ephrim, L., Adzoyi Seyram, A., MacCarthy, Ch., Ganyo, R. M., Aggrey, G., & Aidoo, J. K. (2025). Exploring the Landscape of CPU Scheduling Algorithms: A Review and an Adaptive Deadline-Based Approach. ResearchGate, 23 (1), 1-7. https://www.researchgate.net/publication/388417146_Exploring_the_Landscape_of_CPU_Scheduling_Algorithms_A_Comprehensive_Survey_and_Novel_Adaptive_Deadline-Based_Approach
  6. Hübner, P., Hu, A., Peng, I., & Markidis, S. (2025). Apple vs. Oranges: Evaluating the Apple Silicon M‑Series SoCs for HPC Performance and Efficiency. Cornell Univ. Computer Science. Hardware Architecture. 15 p. https://doi.org/10.48550/arXiv.2502.05317
  7. Process scheduling on M1 series chips: first draft. (2022). The Eclectic Light Company. Macs, Technology. https://eclecticlight.co/2022/01/13/scheduling-of-processes-on-m1-series-chips-first-draft/
  8. Feng, D., Xu, Z., Wang, R., & Lin, F. X. (2025). Profiling Apple Silicon Performance for ML Training. Cornell Univ. Computer Science. Performance. 8 p. https://doi.org/10.48550/arXiv.2501.14925
  9. Buchem, M., Eberle, F., Kasuya Rosado, H. K., Schewior, K., & Wiese, A. (2024). Scheduling on a Stochastic Number of Machines. Cornell Univ. Computer Science. Data Structures and Algorithms. 34 p. https://doi.org/10.48550/arXiv.2407.15737
  10. Tuby, A., & Morrison, A. (2025). Reverse Engineering the Apple M1 Conditional Branch Predictor: A Case Study in Modern CPU Microarchitecture. Cornell Univ. Computer Science. Cryptography and Security. 21 p. https://doi.org/10.48550/arXiv.2502.10719
  11. Nagy, A. L., Kidane, G. S., Turányi, T., & Tóth, J. (2023). MAC, a novel stochastic optimization method. Cornell Univ. Computer Science. Neural and Evolutionary Computing. 20 p. https://doi.org/10.48550/arXiv.2304.12248
  12. Moseley, B., Newman, H., Pruhs, K., & Zhou, R. (2025). Robust Gittins for Stochastic Scheduling. Cornell Univ. Computer Science. Data Structures and Algorithms. 22 p. https://doi.org/10.48550/arXiv.2504.10743




DOI: http://dx.doi.org/10.30970/eli.31.2

Refbacks

  • There are currently no refbacks.